In fourth-generation (4G) Internet Protocol (IP) networks, as in any high-performance data network, measuring and monitoring parameters like latency, available bandwidth, jitter, etc., are of immense importance, since that which is not measured cannot be reliably controlled. In response to this need, several Requests for Comment (RFCs) related to network monitoring and measurement have recently emerged in the Internet Engineering Task Force (IETF), the largest international organization concerned with the evolution of the Internet. Examples include RFC 5357, titled “A Two-Way Active Measurement Protocol (TWAMP),” and RFC 6038, titled “Two-Way Active Measurement Protocol (TWAMP) Reflect Octets and Symmetrical Size Features.”
For some measurements of network performance, there is a requirement of generating a precise packet train, to be used as a traffic pattern for non-intrusive IP network measurement. In particular, some advanced techniques for estimating the available bandwidth in an IP network path require the high-speed generation of a short packet train with precise inter-packet gaps, so that congestion can be generated on a very short time scale. Based on time stamping done at a packet train sender and a receiver, packet dispersion can be evaluated to determine exactly how the packet train is affected as it traverses the network. This packet dispersion can be evaluated in turn to determine the available bandwidth.
The generation of short packet trains with precise inter-packet gaps presents a number of challenges in practice, however. Several of these challenges arise from the architecture of the typical packet processing platform, which may include a control processor, running a non-real-time operating system, a packet/network processor circuit, specially designed to handle real-time processing of network traffic, and line interface cards, which provide hardware-based, high-speed functions such as fabric queuing, traffic shaping, and the like.
One challenge is that increasing port bandwidths necessitate even higher-performance packet generation and transmission techniques. This high performance is not likely to be available from a general-purpose control processing element or from the Operations, Administration and Maintenance (OAM) engine on a packet processor chip, for example, as these devices cannot provide the precise timing needed. If precise inter-packet gaps are not produced, the performance of bandwidth estimation algorithms will be adversely affected. Likewise, additional latency introduced by such devices will delay the measurement feedback, possibly leading to oscillations in control loops and/or to sub-optimal performance in one or more network zones. These problems will continue to get worse with higher-throughput interfaces.
Of course, specialized circuits could be developed for generating high-speed, high-precision packet trains. However, such circuits are likely to be costly, and this approach does not address the problem for existing platforms. Accordingly, techniques are needed for generating high-speed, high-precision packet trains in packet processing platforms having conventional architectures.